In recent years, along with the reduction of the sizes and the thicknesses, and the increase of functions of electronic apparatuses such as cellular phones and computers, there has been increasingly a need for mounting with higher densities in a circuit board electronic components on the circuit board including electrode patterns formed thereon. To cope therewith, in the field of mounting chip components which are fine electronic components for use in surface mounting, the reduction of component sizes and the reduction of pitches between mounted components have been advanced. Further, in order to substantially eliminate the intervals between chip components, electronic components constituted by plural chip components connected to one another are commercially available. Further, there has been suggested stacking of plural large circuit boards with chip components interposed therebetween for realizing high-density mounting.
For example, JP-A No. 6-251993 describes an electronic-component assembly constituted by plural chip components each having a plate shape and having cutouts formed at its four corners and electrodes at its opposite end surfaces, wherein the plural chip components are connected and bonded to one another at their side surfaces on which no electrodes are formed. Further, JP-A No. 2001-223455 describes a technique for fabricating an electric component assembly constituted by two or more chip components having a rectangular-parallelepiped shape and including electrodes at their opposite ends which are stacked in a direction perpendicular to the longitudinal directions of the chip components with an insulation layer interposed therebetween and then mounting the electronic component assembly onto a board including electrode patterns formed thereon. Further, JP-A No. 63-60593 discloses two same-sized chip condensers stacked perpendicularly to the main surface of a board.
Further, FIG. 7 in Pamphlet of International Publication No. 01/048821 and FIG. 20 in a JP-A No. 2003-108963 describe a substrate structure constituted by a first substrate, a second substrate which is electrically connected onto the first substrate through chip components such as resistors and condensers, and other electronic components mounted on the upper and lower main surfaces of the second substrate. In the structure described in Pamphlet of International Publication No. 01/048821 and JP-A No. 2003-108963, chip components between the first substrate and the second substrate are provided instead of conductors for connecting both the substrates to each other, while the other electric components which do not contribute to the electrical connection between the first and second substrates occupy a greater part of the region between these substrates.
On the other hand, in the field of chip-component mounting, along with the reduction of component sizes and the reduction of pitches between mounted components, there has been a need for finer and higher-accuracy mounting, but it is difficult to realize higher-density mounting due to the increase of mounting failures such as missing parts and shorts. Namely, in the field of chip-component mounting, the increase of the densities of mounting by the reduction of component sizes and the reduction of pitches between components has reached a limit. On the other hand, the total thickness of a circuit board after mounting is restricted by packaged components having greater heights than those of chip components, and accordingly, even when fine chip components are mounted thereon at small intervals, there is left a space above the chip components, thus wastefully using spaces for mounting electronic components including chip components.
Further, the technique disclosed in JP-A No. 63-60593 is merely stacking the same type of chip condensers vertically and can be replaced by the use of a single chip condenser with an equivalent capacitance without stacking chip condensers. Further, a limited region of a circuit board can be used for stacking chip condensers due to the restriction on their capacitances and the like, and therefore, such stacking of chip condensers does not significantly contribute to the reduction of the size of the circuit board.
Further, the substrate structure disclosed in Pamphlet of International Publication No. 01/048821 and JP-A No. 2003-108963 can realize high-density mounting with multiple layers, but such high-density mounting requires significant changes in the design of the circuit board. Thereby, such a substrate structure cannot address the requirements for locally and easily mounting chip components with high densities.